Available Technology

SAD5 stereo correlation line striping in an FPGA

This software performs stereo correlation line stripping for an FPGA. The Line Width Striping can be accomplished any number of times. Each stripe reduces the BRAM needed, allowing even larger images or allowing smaller resource usage.The line width stripe count can be different for different applications, and the image width can be different depending on the camera type.
Internal Laboratory Ref #: 
NPO-47245-1
Patent Status: 
U.S. Government Purpose Release
Agency
NASA
Region
Far West
State: 
California
Lab Representatives
Share to Facebook Share to Twitter Share to Google Plus Share to Linkedin