Available Technology

Dynamic memory processor

A dynamic memory processor for time variant pattern recognition and an input data dimensionality reduction is provided having a multi-layer harmonic neural network and a classifier network. The multi-layer harmonic neural network receives a fused feature vector of the pattern to be recognized from a neural sensor and generates output vectors which aid in discrimination between similar patterns. The fused feature vector and each output vector are separately provided to corresponding positional king of the mountain (PKOM) circuits within the classifier network. Each PKOM circuit generates a positional output vector with only one element having a value corresponding to one, the element corresponding to the element of its input vector having the highest contribution. The positional output vectors are mapped into a multidimensional memory space and read by a recognition vector array which generates a plurality of recognition vectors.
Inventors: 

Roger L. Woodall

Patent Number: 
US6560582
Patent Issue Date: 
June 6, 2003
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