Available Technology

Improved Indium Bump Bonding Using Multi-Step Plasma Process

Better conductivity for flip chip hybridization
JPL's process uses a relatively low-power plasma to remove the indium oxide with less sputtering of the underlying indium, and a second step to remove organics left from the first step. Typical processing time for each step has been 20 minutes, although those times could likely be reduced.
Abstract: 
Indium bump bonding is one standard method of connecting electronic chips to circuit boards. Indium solder bumps are deposited over contact pads of both the chip and the board, and then the contact pads are aligned and pressed together to form an electrically conductive bond. One issue with this technique is the formation of oxides on indium bumps when they are exposed to air. This oxide leads to resistance in the contact, limiting the electronic performance. NASA's Jet Propulsion Laboratory (JPL) has devised a unique multi-step plasma process to remove this oxide. Its key advantage is that it preserves the indium itself more effectively. This process could also lead to smaller contact pads and flip-chip circuits, which are of particular interest to any application requiring compact electrical systems.
Benefits: 

Indium bumps exposed to this process seem to exhibit less damage, preserving bump morphology

applications: 

Small consumer devices - cell phones, pagers, etc.

Semiconductor devices - microprocessors, power/switching devices, mixed-signal circuits, etc.

Light-emitting diodes

Reps: 
Patent Number: 
8,163,094
Internal Laboratory Ref #: 
NPO-TOPS-15
Patent Status: 
Patent Issue Date: 
January 29, 2015
Agency
NASA
Region
Far West
State: 
California
Lab Representatives
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